During conversations with industry insiders, some have stated: "Either the industry adopts the Chiplet technology to continue advancing the impact of Moore's Law, or it faces losses in the commercial market." As Moore's Law reaches its limits, Chiplet is widely recognized by the industry as the main technology for increasing computing power over the next five years.

01

The battlefield has been drawn, and the disputes have begun

Chiplet is not a new technology, but this wave has indeed started to heat up in recent years.

What is a Chiplet?

Chiplet, colloquially known as a chiplet or small chip, is a method of integrating multiple module chips with a base chip through die-to-die interconnect technology, forming a system chip that satisfies specific functions, thereby achieving a new form of IP reuse.

In simple terms, it can be understood as sewing together each small chip with "glue" to form a larger chip with stronger performance. This is also not a new technology. For example, Intel combined two chips (one CPU and one fast static memory chip for the CPU's large L2 cache) and placed them in the package of the Pentium Pro CPU, which the company launched at the end of 1995.

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Perhaps last year, most manufacturers were still immersed in the future applications of Chiplet technology, but today, Chiplet has become a must-have role in the products of major manufacturers.First, let's look at AMD, which is one of the most proactive manufacturers in adopting Chiplet technology. In 2019, AMD first experimented with Chiplet packaging, integrating CPU cores of different process nodes and chips with different I/O specifications, significantly improving energy efficiency and functionality. Subsequently, AMD released an experimental product, the 3D V-Cache based on 3D Chiplet technology. The processor chip used is the Ryzen 5000, which employs TSMC's 3D Fabric advanced packaging technology, successfully stacking a 64MB L3 Cache Chiplet in a 3D form with the processor. From a performance standpoint, the prototype chip with 3D Chiplet technology saw an average performance increase of 12%. This also demonstrates the substantial contribution of 3D Chiplet to actual workloads.

Not only in CPUs, but AMD has also chosen Chiplet technology for GPUs. Currently, with the release of the latest MI300 series chips, AMD has also adopted Chiplet technology, with a design of 8 GPU Chiplets plus 4 I/O memory Chiplets, a total of 12 5nm Chiplets packaged together, reaching a transistor count of 153 billion, surpassing NVIDIA's H100 with its 80 billion transistors. This chip was also marketed as a competitor to NVIDIA's H100 upon its launch.

Moreover, the sales proportion of AMD CPUs with Chiplet technology is continuously increasing. According to data from the German computer retailer Mindfactory, from October 2021 to December 2022, the sales proportion of AMD CPUs with Chiplet technology has been steadily rising, from about 80% to about 97%.

Now, let's turn to Intel. Intel's first processor based on Chiplet design was Sapphire Rapids, launched in January 2023. Specifically, by combining four Chiplets with two sets of mirror-symmetric architecture, a fourfold increase in performance and interconnect bandwidth is achieved. Each basic module includes a compute section (CHA & LLC & Cores mesh, Accelerators), a memory interface section (controller, Ch0/1), and an I/O section (UPI, PCIe). By assembling the aforementioned high-performance components into basic building blocks and then interconnecting the Chiplets using EMIB technology, linear performance improvements and cost benefits can be achieved.Finally, let's take a look at NVIDIA. There is no doubt that NVIDIA has firmly established itself as the dominant player in the GPU market, and the "strongest" GPU B200 launched by the dominant NVIDIA this year also uses Chiplet technology. The GB200 super chip is composed of two B200 GPUs and one Arm architecture Grace CPU (central processing unit).

It can be seen that both Intel, AMD, and NVIDIA have utilized Chiplet technology in their own CPUs and GPUs. This has propelled Chiplet into a new phase of commercialization.

The hammer of Chiplet has been heavily struck.

02

Chiplet from CPU to GPU

In the past, traditional GPUs were also composed of a central workload processor that sent rendering tasks to one of the multiple shader blocks within the chip. Each unit was assigned a piece of geometry to process, transform into pixels, and then color them.

Later, AMD found that Chiplet worked very well on CPUs and reduced manufacturing costs. Thus, they also chose to abandon the central processor on GPUs, replacing a single silicon block with multiple small chips, each handling its own tasks. Rendering instructions are sent to the GPU in a long sequence called a command list, where everything is referred to as a draw call.

This document was released in June 2019, nearly two years after submission, and the feature has been implemented in RDNA 2. AMD began promoting this architecture in 2020 and launched the first product equipped with the new RT-texture processor in November of the same year.Moore's Law is not dead, but it is indeed aging, as the cost curve has changed after the 14nm process. The cost of 5nm process technology has nearly doubled compared to the 7nm process, and the 3nm process is expected to nearly double the cost of the 5nm process. With the increasing limitations of semiconductor processes and scale, the traditional strategy of large chips is indeed becoming increasingly difficult to advance.

Overall, Chiplet technology has four major advantages:

First, by dividing functional blocks into smaller chips, there is no need for the continuous increase in chip size. This improves yield and simplifies the design and verification process.

Second, each small chip is independent, which allows for the selection of the best process technology. The logic part can be manufactured using cutting-edge processes, high-capacity SRAM can be made with processes around 7nm, and I/O and peripheral circuits can be made with processes around 12nm or 28nm, significantly reducing manufacturing costs.

Third, the combination is diverse and suitable for customization, making it easy to create derivative types. For example, using the same logic circuit but different peripheral circuits, or the same peripheral circuits but different logic circuits.

Fourth, small chips from different manufacturers can be mixed and used, not just limited within a single manufacturer.

These features are particularly suitable for high-performance computing chips. Compared to traditional consumer chips, computing chips have larger areas, greater storage capacity, and higher requirements for interconnect speeds. Adopting Chiplet technology can reduce costs and improve yield, allow for more "stacking" of computing cores, and facilitate the introduction of HBM memory.

The closer the chips are to the limits of Moore's Law, such as 5nm, 3nm, and 2nm, the more meaningful it is to follow the Chiplet design path.

Ma Kai, a specially-appointed researcher and assistant professor at the Institute for Interdisciplinary Information Sciences, Tsinghua University, has also analyzed which types of chips are suitable for using Chiplet technology: "Specifically, for chip applications, large chips like CPUs and GPUs are suitable. For large chips, it is recommended that those exceeding 200 square millimeters, preferably over 400 square millimeters, are suitable for Chiplet; if we consider only the cost perspective, chips like MCUs, which are inherently low in price, are currently unnecessary to use Chiplet technology."We can also observe that the commercialization of Chiplet technology in CPUs and GPUs has indeed been quite smooth.

03

The Era of Chiplet: Foundries Secretly Making Big Money

The manufacturing steps for Chiplets have seen a significant increase in complexity compared to packaging, while also considering that different connection methods have varying requirements for precision and process technology, the manufacturing process is distributed among IDMs, wafer fabs, and packaging houses.

This presents business opportunities for TSMC and Intel.

The 3nm process technology accounts for 6% of TSMC's total wafer revenue, while 5nm and 7nm account for 33% and 19% of total wafer revenue, respectively. Advanced process technologies (7nm and below) represent 58% of TSMC's total wafer revenue.

Behind the experimental 3D V-Cache product released by AMD, as mentioned earlier, lies TSMC's advanced semiconductor process technology and advanced packaging technology. As a foundry that has mastered the most advanced semiconductor processes and packaging technologies, TSMC's position as the world's top foundry has been consolidated, and its presence in the field of advanced technologies is set to become even stronger.

Thus, TSMC's 7nm and 5nm processes can be better utilized. Upon closer examination of TSMC's revenue, it is evident that the income from advanced process technologies has contributed to its continuous high performance.However, for TSMC, Chiplet also brings new challenges. By adopting Chiplet, TSMC avoids the traditional monopoly model, allowing customers to theoretically obtain their chips from multiple sources. This increases the freedom of choice for customers and promotes a more competitive market environment.

Unlike AMD and NVIDIA, Intel has been developing its IDM 2.0 strategy, placing great importance on wafer foundry services.

From the perspective of foundry services, Chiplet has a different impact on Intel as well.

On one hand, Intel's commitment to delivering five process nodes in four years (Intel 7, Intel 4, Intel 3, Intel 20A, Intel 18A) could be facilitated by Chiplet, as it allows Intel to avoid the difficulties of executing a complete process for complex CPUs or GPUs.

On the other hand, Intel can also leverage the concept of hybrid manufacturers (using Chiplets from multiple foundries and packaging them together) to capture foundry business opportunities. Last year, Intel announced a partnership with TSMC to create the world's first multi-chip package chip compliant with the Universal Chiplet Interconnect Express (UCIe) standard, which includes ICs produced by both Intel and TSMC.

It is worth noting that Intel is the first manufacturer to proactively choose a multi-source foundry business model.

04

Conclusion

The exploration of Chiplet is currently centered around the two major fields of CPU and GPU, but in the long run, as the Chiplet industry chain becomes more mature, the development of Chiplet will not be limited to such large chips, but will have a broader application space.

The popularity of Chiplet also requires the semiconductor industry to make adjustments to build a corresponding and comprehensive ecosystem. The Chiplet products currently on the market are the results of individual developments by major manufacturers, hence there are multiple incompatible Chiplet interconnect technologies in the semiconductor industry at present, leading to a fragmented Chiplet ecosystem.Currently, at the chip packaging level, manufacturers such as TSMC and Intel have already provided advanced packaging technologies like CoWOS and EMIB, which can offer ultra-high-speed, ultra-high-density, and ultra-low-latency interconnections for Chiplets. On the standard protocol level, there are also major companies leading the release of the UCIe 1.0 version, which provides guidance and constraints for cross-chip interface design.

The spring breeze of Chiplet is blowing.